Hacking Question about Streetwalker's CPLD clone of the FPGA GECKO

[QuickProcess]

I just want to clarify for those confused why I'm asking.

• I'm not an electrical engineer
• I'm confused about the purpose of the two chips being used on his device
• I'm not sure if Gecko DEBUG software can be used with this.

So for those that saw Streetwalker's over @ GC-FOREVER. He made an open source version of a CPLD device that can communicate with GC and Wii devices for homebrew development or gecko related stuff (I THINK? still confused).

SCHEMATICS: OSHPARK

I wanted to know about the following chips used below in the picture provided below by Streetwalker:

The chips being used can be found here
FT245R (FTDL CHIP)
XC9572XL (CPLD CHIP)

1. Is FT245R being used to regulate communication with USB cable from the computer to the console?
2. How do you program the CPLD to properly communicate with the wii and the gecko debug tools?

From what I'm understanding, Streetwalker was aware that his remake was a bit bigger than the Shuriken USB but he said you could glue the casing.

and another user on the forum post said that if you load geckoloader.exe, "it will erase your CLPD and your PCB will stop working"

so I'm afraid as to what I should look out for.

I just want to be able to view the ram in games I play on the wii to debug and research. So once I build this I'm sure where to start.

would I just put the below VHDL code into the CPLD and just be able to start ram debugging games with the appropriate software?

I know Shuriken USB provided VHDL code:

 -- newexi.vhd
--------------------------------------------------------------------------------
--
-- File: usbexi.vhd
-- Version: 0.1 Start date 01/07/2010
--
-- Description:
--
-- USB EXI
--
-- Targeted device: Proasic3  AP3125
-- Author: Ian Callaghan
--
--------------------------------------------------------------------------------
-- library definitions
library ieee;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
library synplify;
use synplify.attributes.all;

-- Main entity
entity usbexi is
port (
-- USB
    usb_txe : in std_logic;
    usb_rxf : in std_logic;
    usb_pwren : in std_logic;
    usb_rd : out std_logic;
    usb_wr : out std_logic;
    usb_data : inout std_logic_vector(7 downto 0);
-- Wii
    exi_cs : in std_logic;
    exi_clk : in std_logic;
    exi_do : in std_logic;
    exi_di : out std_logic;
    exi_int : in std_logic;
    led : inout std_logic
);

end usbexi;

architecture arch_usbexi of usbexi is
attribute syn_black_box : boolean;
attribute syn_encoding : string;

subtype bit8 is integer range 0 to 255;

signal reset_conf : std_logic;
signal usb_read_mode_set : std_logic;
signal usb_write_mode_set : std_logic;
signal id_mode_set : std_logic;
signal usb_tx_status_set : std_logic;
signal usb_rx_status_set : std_logic;
signal usb_short_receive_set : std_logic;

signal exi_usb_data_in : std_logic_vector(7 downto 0);
signal exi_usb_data_in1 : std_logic_vector(7 downto 0);
signal exi_read_buffer : std_logic_vector(7 downto 0);
signal exi_read_buffer2 : std_logic_vector(7 downto 0);
signal led_state : std_logic := '0';
signal exi_count : bit8;
signal exi_latch : std_logic;
signal exi_cmd : std_logic_vector(3 downto 0);
signal usb_short_send_set : std_logic;


----------------------------------------------------------------
begin
----------------------------------------------------------------
    
    
    reset_conf <= not usb_pwren; -- pwren is high during suspend, low once configured
                                 -- so we flip it to have reset_conf = 0 for suspend
    
    led <= usb_pwren when led_state = '0' else led_state;

----------------------------------------------------------------
-- Main State Machine
----------------------------------------------------------------

process (exi_clk, exi_cs, reset_conf)

begin
    if(exi_cs = '1' or reset_conf = '0') then
        exi_count <= 0;
        exi_usb_data_in <= (others => '0');
        exi_usb_data_in1 <= (others => '0');
        exi_read_buffer <= (others => '0');
        exi_read_buffer2 <= (others => '0');
        exi_cmd <= (others => '0');
        usb_rd <= '1';
        usb_wr <= '0';
        usb_read_mode_set <= '0';
        usb_write_mode_set <= '0';
        usb_tx_status_set <= '0';
        usb_rx_status_set <= '0';
        usb_short_send_set <= '0';
        usb_short_receive_set <= '0';
        id_mode_set <= '0';
        usb_data(7 downto 0) <= (others => 'Z'); -- best to put here for suspend reasons

    elsif (exi_clk'event and exi_clk ='1') then
        
        case exi_count is
            when 0 =>           
                exi_cmd(3) <= exi_do;
                exi_di <= '0';
            when 1 =>
                exi_cmd(2) <= exi_do;
                exi_di <= '0';
            when 2 =>
                exi_cmd(1) <= exi_do;
                exi_di <= '0';
            when 3 =>
                exi_cmd(0) <= exi_do;
                if(exi_cmd = x"A") then    -- 'A' receive byte from PC
                    if(usb_rxf = '0') then                  -- are we read to read?
                        exi_di <= '1';                      -- ok tell the wii
                        usb_read_mode_set <= '1';
                        usb_rd <= '0';                      -- send RD low 
                    end if;     
                elsif(exi_cmd = x"4") then    -- '4' receive 2 bytes from PC
                    if(usb_rxf = '0') then                  -- are we read to read?
                        exi_di <= '1';                      -- ok tell the wii
                        usb_short_receive_set <= '1';
                        usb_rd <= '0';                      -- send RD low 
                    end if;       
                elsif(exi_cmd = x"E") then    -- 'E' send / receive
                    if(usb_rxf = '0') then                  -- are we read to read?
                        exi_di <= '1';                      -- ok tell the wii,but dont set mode
                        usb_read_mode_set <= '1';
                        usb_rd <= '0';                      -- send RD low
                    end if;   
                 end if;
                
            when 4 =>
                exi_read_buffer(7) <= exi_do;
                if(usb_read_mode_set = '1' or usb_short_receive_set = '1') then
                   exi_di <= '0';                           -- clear
                end if;
                      
                if(exi_cmd = x"B") then    -- 'B' send byte to PC
                    if(usb_txe = '0') then                 -- can we write?
                        exi_di <= '1';                      -- ok tell the wii
                        usb_write_mode_set <= '1';
                    end if;
                elsif(exi_cmd = x"C") then    -- 'C' check TX status
                    if(usb_txe = '0') then                 -- can we write?
                        exi_di <= '1';                      -- ok tell the wii
                        usb_tx_status_set <= '1';
                    end if;
                elsif(exi_cmd = x"7") then    -- '7' LED off
                    led_state <= '1';
                elsif(exi_cmd = x"8") then    -- '8' LED on
                    led_state <= '0';
                elsif(exi_cmd = x"9") then    -- '9' ID
                    id_mode_set <= '1';
                    exi_di <= '1';    -- 1
                elsif(exi_cmd = x"D") then    -- '6' receive rx status
                    if(usb_rxf = '0') then                  -- are we read to read?
                        exi_di <= '1';                      -- ok tell the wii,but dont set mode
                        usb_rx_status_set <= '1';
                    end if; 
                elsif(exi_cmd = x"E") then    -- 'E' send / receive
                    if(usb_txe = '0') then                  -- are we read to read?
                        exi_di <= '1';                      -- ok tell the wii,but dont set mode
                        usb_write_mode_set <= '1';
                    end if;
                elsif(exi_cmd = x"5") then -- '5' Send short
                    if(usb_txe = '0') then
                        exi_di <= '1';
                        usb_short_send_set <= '1';
                    end if;
                end if;
                
            when 5 =>                                  -- get data here
                exi_read_buffer(6) <= exi_do;
                if(usb_read_mode_set = '1' or usb_short_receive_set = '1') then
                    exi_usb_data_in(7 downto 0) <= usb_data(7 downto 0);
                end if;
                
                if(usb_write_mode_set = '1' or usb_tx_status_set = '1' or usb_rx_status_set = '1' or usb_short_send_set = '1') then
                   exi_di <= '0';                           -- clear
                end if;

                if(id_mode_set = '1') then
                    exi_di <= '0'; -- 2
                end if;

            when 6 =>
                exi_read_buffer(5) <= exi_do;
                if(usb_read_mode_set = '1' or usb_short_receive_set = '1') then
                   usb_rd <= '1';                           
                end if;

                if(id_mode_set = '1') then
                    exi_di <= '0'; -- 3
                end if;

            when 7 =>
                exi_read_buffer(4) <= exi_do;
                if(usb_read_mode_set = '1') then
                   exi_di <= exi_usb_data_in(7);
                end if;

                if(id_mode_set = '1') then
                    exi_di <= '0'; -- 4
                end if;


            when 8 =>   
                exi_read_buffer(3) <= exi_do;
                if(usb_read_mode_set = '1') then
                   exi_di <= exi_usb_data_in(6);
                end if;

                 if(id_mode_set = '1') then
                    exi_di <= '1'; -- 5
                end if;
                
            
            when 9 =>
                exi_read_buffer(2) <= exi_do;
                if(usb_read_mode_set = '1') then
                   exi_di <= exi_usb_data_in(5);
                end if;

                 if(id_mode_set = '1') then
                    exi_di <= '1'; -- 6
                end if;
                

            
            when 10 =>
                exi_read_buffer(1) <= exi_do;
                if(usb_read_mode_set = '1') then
                   exi_di <= exi_usb_data_in(4);
                end if;

                 if(id_mode_set = '1') then
                    exi_di <= '1'; -- 7
                end if;
            
            when 11 =>                                 
                -- read
                exi_read_buffer(0) <= exi_do;
      
                if(usb_read_mode_set = '1') then
                   exi_di <= exi_usb_data_in(3);
                end if;
                
                if(id_mode_set = '1') then
                    exi_di <= '0';  -- clear
                end if;
            
            when 12 =>                         -- keep high 40 ns
                 exi_read_buffer2(7) <= exi_do;
                
                 if(usb_write_mode_set = '1' or usb_short_send_set = '1') then
                    usb_wr <= '1';                  -- WR goes high 20ns
                    usb_data(7 downto 0) <= exi_read_buffer;
                end if;
        
                
                if(usb_read_mode_set = '1') then
                   exi_di <= exi_usb_data_in(2);               
                end if;     

            when 13 =>                         
                exi_read_buffer2(6) <= exi_do;

                if(usb_read_mode_set = '1') then
                   exi_di <= exi_usb_data_in(1);
                end if;
 

            when 14 =>
                exi_read_buffer2(5) <= exi_do;
                
                if(usb_write_mode_set = '1' or usb_short_send_set = '1') then   -- go low
                    usb_wr <= '0';                 
                    usb_data(7 downto 0) <= (others => 'Z');
                end if;
                
                if(usb_read_mode_set = '1') then
                   exi_di <= exi_usb_data_in(0);
                end if;
              
            when 15 =>
                exi_read_buffer2(4) <= exi_do;
                
                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in(7);
                end if;
                
            when 16 =>
                exi_read_buffer2(3) <= exi_do;
                
                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in(6);
                end if;

            when 17 =>
                exi_read_buffer2(2) <= exi_do;

                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in(5);
                 end if;

            when 18 =>
                exi_read_buffer2(1) <= exi_do;
                
                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in(4);
                end if;

            when 19=>
                exi_read_buffer2(0) <= exi_do;

                if(usb_short_receive_set = '1') then
                    usb_rd <= '0';                      -- send RD low
                    exi_di <= exi_usb_data_in(3);
                end if;

            when 20 =>      -- second byte
                if(usb_short_send_set = '1') then
                    usb_wr <= '1';                  -- WR goes high 20ns
                    usb_data(7 downto 0) <= exi_read_buffer2;
                end if;

                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in(2);
                end if;
            when 21 =>
                if(usb_short_receive_set = '1') then
                    exi_usb_data_in1(7 downto 0) <= usb_data(7 downto 0);
                    exi_di <= exi_usb_data_in(1);
                 end if;

            when 22 =>
                if(usb_short_send_set = '1') then   -- go low second byte
                    usb_wr <= '0';                 
                    usb_data(7 downto 0) <= (others => 'Z');
                end if;
                
                if(usb_short_receive_set = '1') then
                   usb_rd <= '1'; 
                   exi_di <= exi_usb_data_in(0);                         
                end if;

            when 23 =>
                  if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in1(7);
                  end if;

            when 24 =>
                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in1(6);
                end if;

            when 25 =>
                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in1(5);
                end if;

            when 26 =>           
                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in1(4);
                end if;

            when 27 =>           
                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in1(3);
                end if;

            when 28 =>
                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in1(2);
                end if;

            when 29 =>
                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in1(1);
                end if;

            when 30 =>
                if(usb_short_receive_set = '1') then
                    exi_di <= exi_usb_data_in1(0);
                end if;

            when 31 =>


        end case;
        
        exi_count <= exi_count + 1;
    end if;
end process;

end arch_usbexi;

 

[dilav]

Not sure what you're asking, you got the gist of it. The FTDL chip is responsible for USB communication to PC and CPLD. The CPLD contains the gecko code for communication.

VHDL file is the source code. It's been a while but I think streetwalker and shuriken usb code is near identical which was a small modification to the original gecko (SE?) VHDL.
UCF (user constraints file) contains the pin mapping. Basically what legs of the chip is connected to what user defined variable. This probably varies between project.
But you can just ignore it all and use the pre-complied XSVF file and flash the CPLD over JTAG.
You also want to flash the FTDI per streetwalker's instruction. All software that works on the Gecko SE should work on these clones.

Not sure why you are mixing projects. If you want to use the shuriken usb case then build the shuriken usb. If it's too much trouble try Dolphin emulator or pay to have someone build you one.

 

[QuickProcess]

Not sure what you're asking, you got the gist of it. The FTDL chip is responsible for USB communication to PC and CPLD. The CPLD contains the gecko code for communication.

VHDL file is the source code. It's been a while but I think streetwalker and shuriken usb code is near identical which was a small modification to the original gecko (SE?) VHDL.
UCF (user constraints file) contains the pin mapping. Basically what legs of the chip is connected to what user defined variable. This probably varies between project.
But you can just ignore it all and use the pre-complied XSVF file and flash the CPLD over JTAG.
You also want to flash the FTDI per streetwalker's instruction. All software that works on the Gecko SE should work on these clones.

Not sure why you are mixing projects. If you want to use the shuriken usb case then build the shuriken usb. If it's too much trouble try Dolphin emulator or pay to have someone build you one.

I built 20 of them these past two weeks they all work great yeah I got it now thank you

 

[nitr8]

Is anyone with the EU countries ACTUALLY ABLE to build these devices? I'm not interested in code modifying - just debug messages over the serial port for my development stuff.

I couldn't imagine that it's THIS HARD to come across even ONE of those devices these days if you try to imagine that there have been 2 clones of the USB Gecko at minimum...

This is a real mess...